About me
I'm an upcoming 2025 graduate with a knack for problem-solving and a passion for technology.
I enjoy turning complex problems into simple, beautiful and intuitive designs.
Top Skills
-
Internet of Things (IoT)
-
RTL Design
-
Very-Large-Scale Integration (VLSI)
-
Artificial Intelligence (AI)
Tech Stack
Languages:
C / C++, Python
HDL:
Verilog, System Verilog
EDA Tools:
Cadence Virtuoso, Xylinx Vivado, Xylinx ISE, KiCad, NgSpice, eSim
Libraries:
Numpy, Pandas, Scikit-learn, TensorFlow
Tools & Platforms:
UVM, Shell-scripting, Arduino, MATLAB, Git/GitHub, MS Office. Linux, Windows
Education
-
Jalpaiguri Government Engineering College
2022 — 2025(Expected)
West Bengal, INBachelor of Technology (Electronics and Communication Engineering)
CGPA: 8.89/10 -
A.P.C Ray Polytechnic
2019 — 2022
Jadavpur, Kolkata, INDiploma in Engineering
CGPA: 8.89/10
Experience
-
Celebal Technology
(Remote)Summer Intern
June - August 2024– Deployed a Python-based anomaly detection system, leveraging unsupervised learning techniques to analyse network traffic data to identify unusual patterns and anomalies, which could signal potential security breaches or system malfunctions.
– Optimized the performance by tuning the latent dimension in auto encoder. Achieved maximum accuracy while minimizing false positives. -
University of Calcutta
Kolkata, INResearch Intern
May - June 2024– Designed and implemented PWM control system using Verilog on Xilinx FPGA to regulate MOSFETs driving a pump for a cold collision experiment at the Chemistry Lab.
– Ensured efficient signal transmission through impedance matching and verified PWM functionality using an Oscilloscope.
– Achieved precise control of the pump’s operation within the experiment’s critical temperature requirements, ensuring optimal cold collision environment
